VHDL Expert

'I am ready for free test' I am working as FPGA design engineer since last 7 years. Find details of the projects I have completed TSMAC Hardware acceleration (3 months) The project is to develop hardware acceleration block for TSMAC IP to reduce the overhead created in software for packet creation and detection. CSI-2 transmitter and receiver(6 months) The project is to develop CSI-2 transmitter and receiver IPs according to the mipi standards eMMC Host Controller and Device controller (3months) The project is to develop eMMC host and Device controller IP according to the JEDEC standards. Mobile camera – testing (3 months) The project is to develop 3D image processing algorithms on 1K sensor from PMD technologies High resolution camera(6.5 Months) The project is to develop 2D and 3D image processing algorithms on 100K sensor from Infineon sensor -Test project for DDR2 accesses -Defining the requirements and finalizing the approach for calibration module -Development of chain control module -Development of control signal generator -Development of Generic LUT module -Development of Divider radix-2 algorithm -Development of atan calculator -Development of MCB reader state machine Color Pipeline (CPL)(15 months) The project is to develop 2D and 3D image processing algorithms on Aptina sensor -Development of Generic Frame Buffer pCore -Development of data compression and data packing pCore VPU-Video Processing Unit (13 months) Optimization of module for time and resource

'I am ready for free test'. Please share more details regarding the type of work,i mean is it HDL coding or Verfication

Hello, I am ready for free test. My name is Mohamed. I have 7 yeas experience in VHDL and Verilog. I worked on many projects through my college and here in freelancer. you can check my profile for more details about me. Regards

Hello, I am an electronics engineer having experience of FPGA based Digital system design for more than 4 years. I am ready for free test.

I am ready for free test. I was Verification engineer of network processors for 2 years and 9 months. I also worked on the design of a deep packet inspection extension to an Ethernet switch on FPGA. I have expirience with VHDL, Verilog, System Verilog, Perl, Tcl, Python.

I am ready for free test. Hello, We are a team of embedded hardware and software professionals with experience in VHDL coding, simulation and implementation. Would like to know more details about the project. Looking forward to work on this project. Please feel free to contact us for any further discussions. Thanks and Regards EmWorld

Involved in FPGA design and verification in vhdl. Mostly xilinx FPGA s used and modelsim for verification.

I am ready for free test. I have done my post graduation in MICROELECTRONICS AND VLSI DESIGN from NIT CALICUT. I am strong in VHDL and VERILOG coding.

Hi I am from India and currently working on FPGAs in Gurgaon. I have an overall experience of 3 years in this domain. I understand the urgency of your need of getting a VHDL expert and I can tell you that I am an expert in this language. But first I need to know the exact task that you want me to accomplish. Hoping for a favorable response.

'I am ready for free test' I have 14 years of experience in IC design and Verification I can help you in doing this project

I am ready for free test. I have over 12 years experience in VHDL / FPGA experience. Thanks a lot......