I am a fourth-year student from the Department of Electronics and Electrical Communication Engineering. This is the domain of my interest. I shall be able to do this in a few hours. I have more than 12 months of continuous experience working with Verilog. I am in great touch. You can check if you want.
I request you to please consider.
Thank you.
Hi
I have experienced in Quartus II LPM (mega wizard IP )and VHDL, also I have the prior experience in MIPS processor and its ISA. you can verify my profile for recent projects about MIPS processor. I recently completed the assignment like this. Come into chat for more details
thank you