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Need FPGA RTL engineer

$8-15 USD / hour

Stengt
Lagt ut nesten 5 år siden

$8-15 USD / hour

Kindly share your availability and rates for a image processing module to be developed in FPGA.
Prosjekt-ID: 19979218

Om prosjektet

8 forslag
Eksternt prosjekt
Aktiv 5 år siden

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8 freelancers are bidding on average $15 USD/time for this job
Brukeravatar
Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
$15 USD om 30 dager
4,9 (94 omtaler)
6,9
6,9
Brukeravatar
Hello, I'm on only on Friday and Saturday and max of two hours daily in the rest of the week. BR, M.T. ============================================ I have long experience with FPGA and VHDL . I work with both intel and Xilinx FPGAs , SoC and SOPC. I use Quartus II and Vivado IDEs accordingly. I test timing compliance through timing analysis . I deliver tested , neat and well-commented code that can be reused or modified for future development. More to be discussed once you contact me . BR, M.T.
$16 USD om 40 dager
4,8 (41 omtaler)
6,0
6,0
Brukeravatar
Hello , This is Prasad as a VLSI Engineer I observed your work i have an experience on developement and research papers solutions on Matlab & Simulink , Python VHDL Verilog Spice, software
$14 USD om 40 dager
5,0 (8 omtaler)
3,3
3,3
Brukeravatar
Hi, I have worked on several ASIC / FPGA projects involving VHDL, Verilog, SystemVerilog..etc. I have also worked on Image / Video processing IPs like JPEG Codec, JPEG-XR, BT656 Decode, PNG Decoder.. etc. I can definitely work on your project. Please share more details about the project. Thank You,
$25 USD om 40 dager
5,0 (3 omtaler)
2,6
2,6
Brukeravatar
I have done my FYP on image processing and FPGA: "Real-time Vision Based Implementation of Plant Disease Identification System on Zynq SOC FPGA (Xilinx 702 Evaluation Board)". I have specialization in following: Embedded System Design based on • Digital System Design (FPGA, CPLD) • Signal and Image Processing Algorithms • Micro-Controllers & Processors  Hands on experience on following platforms: 1) Xilinx heterogeneous architectures: ZYNQ 7020, 7035 and 7045 SOC FPGAs. 2) ZYNQ 702 and 706 FPGA boards. 3) Xilinx low power FPGAs Artix 7, Nexys 2,3 and 4 boards. 4) Xilinx low density Spartan FPGAs. Spartan 3E FPGA development kit. 5) Trenz TE0782 & TE0783 SOM FPGA boards. 6) Intel: Cyclone 10 FPGA development kit. 7) Analog devices: Realtime 3G/4G SDR based ADI RF integrated devices. 8) Atmel AVR microcontroller ATmega16/32/328, Arduino (Uno, Mega & Nano), (PIC based) chip kit.
$8 USD om 40 dager
3,4 (1 omtale)
2,3
2,3
Brukeravatar
I'm an experience RTL hardware engineer in Silicon Valley. Have experience developing modules and verifying with testbenches for various FPGA vendors and ASICs. Have good coding skills and also silicon bring up and debugging experiences in image processing architectures using FPGA libraries. Please message me if you need specifics and more details.
$16 USD om 40 dager
0,0 (0 omtaler)
2,9
2,9
Brukeravatar
I have been working on FPGA and ASIC for last 9 years.
$16 USD om 10 dager
0,0 (0 omtaler)
0,0
0,0

Om klienten

INDIAs flagg
Delhi, India
5,0
1
Betalingsmetode bekreftet
Medlem siden nov. 2, 2014

Klientbekreftelse

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