Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Ansett Verilog / VHDL Designers

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    14 jobber funnet, priser i USD

    Create a project about a 128x3 (128 words, with 3 bits at each word) single-port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. •One side of the DIP switch clears the memory address (not the memory contents). •The depressing of the first push-button indicates a memory write...

    $54 (Avg Bid)
    $54 Snitt bud
    5 bud

    I need parse Verilog (vhdl) code for fpga, structure the same code and rewrite to another fpga. The project is ready.

    $3785 (Avg Bid)
    $3785 Snitt bud
    14 bud
    ADC in FPGA 6 dager left
    VERIFISERT

    Implementation of suitable RC filter for ADC. Digital part implementation is done on FPGA. RC filter has to be designed for given specification.

    $23 (Avg Bid)
    $23 Snitt bud
    6 bud

    VHDL code of optimization algorithm fixing.

    $63 (Avg Bid)
    $63 Snitt bud
    8 bud

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    $167 (Avg Bid)
    $167 Snitt bud
    3 bud

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    $27 (Avg Bid)
    $27 Snitt bud
    1 bud

    i want to design step by step antenna by CST program (spiral antenna) by TeamViewer you will describe to me how to design it

    $120 (Avg Bid)
    $120 Snitt bud
    13 bud

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    $169 (Avg Bid)
    $169 Snitt bud
    3 bud

    Hello Please check it carefully. /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ......................................................... [logg inn for å se URL] have a look here, at the moment I need only labaa 3. maybe you have to download the file...

    $23 (Avg Bid)
    $23 Snitt bud
    2 bud

    DVLSI project 'ASIC design of face detection using haar wavelet'. Use verilog, FPGA and Viola Jones algorithm

    $269 (Avg Bid)
    $269 Snitt bud
    3 bud
    Operating System Computer Engineer 3 dager left
    VERIFISERT

    need an operation system engineer to help in mathematical CPU process

    $153 (Avg Bid)
    $153 Snitt bud
    6 bud

    Program the Odrive motor controller hardware, to make two odrive control four motors, four motor RPM can send to my stm32 microprocessor over can bus.

    $20 / hr (Avg Bid)
    $20 / hr Snitt bud
    10 bud

    Hardworking and easy to communicate freelancer is needed. The deliverable need to be unique. Please check attached specs

    $193 (Avg Bid)
    $193 Snitt bud
    8 bud