Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Ansett Verilog / VHDL Designers

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    23 jobber funnet, priser i USD

    Project 1 is a non-pipelined MIPS. Project 2 is a pipelined MIPS without the considerations for branch hazard and data forwarding. Project 3 is a pipelined MIPS including branch hazard and data forwarding.

    $146 (Avg Bid)
    $146 Snitt bud
    3 bud

    Implement an SRAM circuit that has a 32 bytes with its associated decoder and multiplexer. The SRAM memory must have the following properties: 1- Addresses are from 0x8000 to 0x801F. 2- You can read and write one byte at a time. 3- The are special output signals that are required. They are listed in the table below.

    $191 (Avg Bid)
    $191 Snitt bud
    9 bud

    The project is to implement a GPS / Galileo signal tracking algorithm into the FPGA side of a Zynq 7020. A first algorithm has been already developed and validiated on Matlab. The scope of this job is Task-1.1 FPGA Design to convert the GNSS tracking algorithms given in C++ by 3D Aerospace for to the FPGA (in VHDL) side of a Zynq-7020 using Vivado 2019.1 (baremetal) Task-1.2 Validation of the V...

    $21 / hr (Avg Bid)
    $21 / hr Snitt bud
    4 bud

    Need engineer with experience in MATLAB and VERILOG and can handle the project. More details will be shared over a chat

    $149 (Avg Bid)
    $149 Snitt bud
    9 bud

    The broad area regarding the project is related to fingerprint identification and classification using CNN algorithm which is to be implemented using simulink on FPGA board

    $353 (Avg Bid)
    $353 Snitt bud
    4 bud

    Project need ethminer kernel(source and binary file) for xilinx u200. I want to program using vhdl/Verilog.

    $2600 (Avg Bid)
    $2600 Snitt bud
    1 bud
    Modelling and simulation (Verilog) 5 dager left
    VERIFISERT

    I have done a Verilog module for clock and data recovery using DLL ( this is for simulation purposes only) I used Modelsim for simulation. In the transmitter (Tx), I only have a clock that has a random phase shift and random data both going to an XOR gate. The output is just data out. I also used Manchester coding scheme as a data format. The receiver (Rx) doesn't have a clock, it has to extr...

    $191 (Avg Bid)
    $191 Snitt bud
    7 bud
    ethereum bit stream 5 dager left
    VERIFISERT

    i have fpga vcu/bcu1525 card, vivado lab & miner..so i need just ether bit stream and [logg inn for å se URL] any one understand my project and contact me.

    $1500 - $3000
    $1500 - $3000
    0 bud

    The project is to implement a GPS / Galileo signal tracking algorithm into the FPGA side of a Zynq 7020. A first algorithm has been already developed and validiated on Matlab. The scope of this job is Task-1.1 FPGA Design to convert the GNSS tracking algorithms given in C++ by 3D Aerospace for to the FPGA (in VHDL) side of a Zynq-7020 using Vivado 2019.1 (baremetal) Task-1.2 Validation of the V...

    $21 / hr (Avg Bid)
    $21 / hr Snitt bud
    4 bud
    FPGA Mining 4 dager left

    FPGA Mining fot Xilinx® Alveo™ U30

    $126 (Avg Bid)
    $126 Snitt bud
    2 bud
    assembler simple project 4 dager left
    VERIFISERT

    assembler simple project contact for more details

    $121 (Avg Bid)
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    11 bud

    it is analog based project required a good knowledge in the cadence or in analog tool that is good

    $54 (Avg Bid)
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    5 bud
    device expert 4 dager left
    VERIFISERT

    I am going to add required with Xilinx and Vivado in A BASYS 3 BOARD

    $12 / hr (Avg Bid)
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    2 bud

    Hi, I have a project for data modulation and encoding, I did part of it in digital and I need help in analysis and measruments

    $141 (Avg Bid)
    $141 Snitt bud
    7 bud

    Hi, I have a project for inductive coupling coils I have all parameters and I would like to inject some crosstalk (jitter in the time domain) in the transmitter clock only and see the consequences in the Rx side and calculate BER and so on ,..

    $256 (Avg Bid)
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    7 bud

    the assignment is to create a register file design using vhdl language. one has to write usig the attached template.

    $16 (Avg Bid)
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    5 bud
    snake leader game 12 dager left

    use verilog language to make snake and leader game

    $29 (Avg Bid)
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    8 bud
    Eaton PLC Project 10 dager left
    VERIFISERT

    Our customer has a machine controlled by Eaton PLC. Vendor has abandoned the system but the PLC software is installed. Need a PLC programmer experienced with Eaton to work with our programmers to examine and document the code currently installed and then assist our programmers to integrate the PLC system into our application. The system is overseas so work would be done using remote connection

    $879 (Avg Bid)
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    24 bud
    Fpga designing -- 2 Avsluttet left

    Hi I need help for my project on FPGA board for implementation of design using Vhdl. Please contact asap.

    $25 (Avg Bid)
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    14 bud
    PCIe on Xilinx FPGA Avsluttet left
    VERIFISERT

    Need to develop a system that uses PL based logic to implement PCIe bus for communication with PC

    $506 (Avg Bid)
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    4 bud

    i have a 3 axis machine controlled by stepper motors the stepper motors are controlled by a STM32. i am using the NUCLEO-F746ZG as the board. the embedded controller needs to communicate with a PC application using a USB.

    $26 / hr (Avg Bid)
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    35 bud

    I just need help with this Verilog assignment asap

    $32 (Avg Bid)
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    28 bud
    I need a coder Avsluttet left

    I am doing a coding project to get into a program to become a coder using bluej and need help!

    $130 (Avg Bid)
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    19 bud