Verilog / VHDL Jobs

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Om Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Ansett Verilog / VHDL Designers

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    14 jobber funnet, priser i USD
    embedded systems (fpga) 6 dager left

    Create a project about a 128x3 (128 words, with 3 bits at each word) single-port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. •One side of the DIP switch clears the memory address (not the memory contents). •The depressing of the first push-button indicates a memory write...

    Elektrisk ingeniørvitenskap Elektronikk FPGA Microcontroller Verilog / VHDL
    $54 (Avg Bid)
    $54 Snitt bud
    5 bud
    By nå
    Restructuring and Code Conversion 6 dager left

    I need parse Verilog (vhdl) code for fpga, structure the same code and rewrite to another fpga. The project is ready.

    Elektronikk FPGA Microcontroller Verilog / VHDL
    $3785 (Avg Bid)
    $3785 Snitt bud
    14 bud
    By nå
    ADC in FPGA 6 dager left
    VERIFISERT

    Implementation of suitable RC filter for ADC. Digital part implementation is done on FPGA. RC filter has to be designed for given specification.

    Elektrisk ingeniørvitenskap Elektronikk FPGA Microcontroller Verilog / VHDL
    $23 (Avg Bid)
    $23 Snitt bud
    6 bud
    By nå
    VHDL code of optimization algorithm fixing. -- 2 5 dager left

    VHDL code of optimization algorithm fixing.

    Matlab and Mathematica Python Verilog / VHDL
    $63 (Avg Bid)
    $63 Snitt bud
    8 bud
    By nå
    implement a pipelined MIPS proccessor simulator in C++ -- 2 5 dager left
    VERIFISERT

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    Assembly C-programmering C++ Programmering Programvarearkitektur Verilog / VHDL
    $167 (Avg Bid)
    $167 Snitt bud
    3 bud
    By nå
    implement a pipelined MIPS proccessor simulator in C++ ... 4 dager left
    VERIFISERT

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    Assembly C-programmering C++ Programmering Programvarearkitektur Verilog / VHDL
    $27 (Avg Bid)
    $27 Snitt bud
    1 bud
    By nå
    1 hour design antenna by CST program 4 dager left
    VERIFISERT

    i want to design step by step antenna by CST program (spiral antenna) by TeamViewer you will describe to me how to design it

    Circuit Design Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap Verilog / VHDL
    $120 (Avg Bid)
    $120 Snitt bud
    13 bud
    By nå
    implement a pipelined MIPS proccessor simulator in C++ 4 dager left
    VERIFISERT

    Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

    Assembly C-programmering C++ Programmering Programvarearkitektur Verilog / VHDL
    $169 (Avg Bid)
    $169 Snitt bud
    3 bud
    By nå
    implement a pipelined MIPS proccessor simulator in C++ Expert 4 dager left
    VERIFISERT

    Hello Please check it carefully. /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ......................................................... [logg inn for å se URL] have a look here, at the moment I need only labaa 3. maybe you have to download the file...

    Assembly C-programmering C++ Programmering Programvarearkitektur Verilog / VHDL
    $23 (Avg Bid)
    $23 Snitt bud
    2 bud
    By nå
    DVLSI project 'ASIC design of face detection using haar wavelet'. 4 dager left

    DVLSI project 'ASIC design of face detection using haar wavelet'. Use verilog, FPGA and Viola Jones algorithm

    Ingeniørvitenskap FPGA Verilog / VHDL
    $269 (Avg Bid)
    $269 Snitt bud
    3 bud
    By nå
    Operating System Computer Engineer 3 dager left
    VERIFISERT

    need an operation system engineer to help in mathematical CPU process

    Computer Science Electronic Design Elektronikk Ingeniørvitenskap Verilog / VHDL
    $153 (Avg Bid)
    $153 Snitt bud
    6 bud
    By nå
    Odrive motor driver programming 2 dager left

    Program the Odrive motor controller hardware, to make two odrive control four motors, four motor RPM can send to my stm32 microprocessor over can bus.

    Arduino C-programmering Elektronikk Microcontroller Verilog / VHDL
    $20 / hr (Avg Bid)
    $20 / hr Snitt bud
    10 bud
    By nå
    Privat prosjekt eller konkurranse #21362369 20 dager left

    Vennligst Registrer deg eller Logg inn for å se detaljer.

    Digital Electronics Elektronikk FPGA Local Job Programming Programvarearkitektur Programvareutvikling Testing av programvare Telekommunikasjonsteknikk Verilog / VHDL Video Processing
    Forseglet Taushetspliktsavtale
    By nå
    C99 program to implement networked simulation 1 dag left
    VERIFISERT

    Hardworking and easy to communicate freelancer is needed. The deliverable need to be unique. Please check attached specs

    C-programmering C++ Programmering Java Programvarearkitektur Verilog / VHDL
    $193 (Avg Bid)
    $193 Snitt bud
    8 bud
    By nå
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