Verilog / VHDL Jobs

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Om Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Ansett Verilog / VHDL Designers

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    21 jobber funnet, priser i USD
    Design a traffic light system using verilog 6 dager left
    VERIFISERT

    I need you to develop some software for me. I would like this software to be developed for Windows.

    Programvarearkitektur Verilog / VHDL Windows skrivebord
    $45 (Avg Bid)
    $45 Snitt bud
    4 bud
    By nå
    linux build for zynq board 6 dager left
    VERIFISERT

    https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841738/Getting+Started [logg inn for å se URL] (Petalinux) Linux build and application development for simple LED blink project. Someone with good FPGA/SoC embedded development experience.

    FPGA FPGA Coding Linux Verilog / VHDL
    $180 (Avg Bid)
    $180 Snitt bud
    3 bud
    By nå
    router design 6 dager left
    VERIFISERT

    Asynchronous-Logic QDI Quad-Rail Sense-Amplifier Half-Buffer Approach for NoC Router Design

    Circuit Design Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap Verilog / VHDL
    $21 - $174
    $21 - $174
    0 bud
    By nå
    Analog cmos VLSI Design 6 dager left
    VERIFISERT

    Full custom design of Sense Amplifier Half-Buffer for asynchronous VLSI Design.

    Circuit Design Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap Verilog / VHDL
    $208 (Avg Bid)
    $208 Snitt bud
    2 bud
    By nå
    Need FPGA HCS08 Expert 6 dager left

    Hi, I need FPGA HCS08 Expert we will be using HCS08 DE1 MicroController. more details i will share in chat box. please if you have experience relegated to this bid. thanks.

    Arduino Elektrisk ingeniørvitenskap Elektronikk Microcontroller Verilog / VHDL
    $174 (Avg Bid)
    $174 Snitt bud
    5 bud
    By nå
    Need to build design in FPGA board 6 dager left
    VERIFISERT

    Need to build design in FPGA board

    Elektrisk ingeniørvitenskap Elektronikk FPGA Microcontroller Verilog / VHDL
    $171 (Avg Bid)
    $171 Snitt bud
    6 bud
    By nå
    VHDL Circuit Design and Simulation 6 dager left
    VERIFISERT

    VHDL Circuit Design and Simulation

    Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap FPGA Verilog / VHDL
    $165 (Avg Bid)
    $165 Snitt bud
    18 bud
    By nå
    General purpose regester 5 dager left
    VERIFISERT

    complete the design of a simple general purpose processor using Xilinx ISE Schematic Capture.

    Elektrisk ingeniørvitenskap Elektronikk Microcontroller PCB Layout Verilog / VHDL
    $197 (Avg Bid)
    $197 Snitt bud
    8 bud
    By nå
    Intel Quartus Mealy and Moore machine circuit design for project 5 dager left
    VERIFISERT

    finite-state synchronous machines mealy and moore machine for given task, using Intel Quartus.

    Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap Verilog / VHDL
    $181 (Avg Bid)
    $181 Snitt bud
    15 bud
    By nå
    VHDL Calculator With PmodKYPD and PmodCLP -- 2 5 dager left

    Hello, I need to create a project in VHDL: a simple operations calculator (addition, subtraction, multiplication, and division). The result have to be displayed on the PmodCLP I need this to implement on the board NEXYS 4, Artix 7 FPGA. The VHDL code should be developed in Xilinx ISE. I would need the documentation. Also include as many comments as you can about what is going on so that I can...

    Elektrisk ingeniørvitenskap Elektronikk FPGA Microcontroller Verilog / VHDL
    $210 (Avg Bid)
    $210 Snitt bud
    3 bud
    By nå
    VHDL Calculator With PmodKYPD and PmodCLP 5 dager left

    Hello, I need to create a project in VHDL: a simple operations calculator (addition, subtraction, multiplication, and division). The result have to be displayed on the PmodCLP I need this to implement on the board NEXYS 4, Artix 7 FPGA. The VHDL code should be developed in Xilinx ISE. I would need the documentation. Also include as many comments as you can about what is going on so that I can...

    Elektrisk ingeniørvitenskap Elektronikk FPGA Microcontroller Verilog / VHDL
    $220 (Avg Bid)
    $220 Snitt bud
    8 bud
    By nå
    Design Verification 4 dager left

    PCle, ethernet , UVM, System Verilog

    FPGA Verilog / VHDL
    $200 (Avg Bid)
    $200 Snitt bud
    2 bud
    By nå
    Custom Camera Software 3 dager left

    We plan to use the Sny IMX420 imager, the Framos IP Core and a Xilinx FPGA. Looking for a vision software freelancer with experience in these technologies. Vivado 2018 or later.

    C-programmering Verilog / VHDL
    $53 / hr (Avg Bid)
    $53 / hr Snitt bud
    10 bud
    By nå
    Simulating Multiple Gates - Third installment (Verilog + C) 2 dager left
    VERIFISERT

    The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...

    C-programmering C++ Programmering Elektrisk ingeniørvitenskap Microcontroller Verilog / VHDL
    $61 (Avg Bid)
    $61 Snitt bud
    12 bud
    By nå
    Make an interface for a MIPS Game 2 dager left
    VERIFISERT

    *CHEAPEST BID WILL WIN* I need someone to code an interface for a game similar to minesweeper in MIPS. The logic and everything is provided, all I need someone is to complete the interface. This sounds very complicated but it's an easy job, and that's why this comes under micro project. Files and more details will be provided over chat.

    Assembly FPGA Spilldesign Programvarearkitektur Verilog / VHDL
    $43 (Avg Bid)
    $43 Snitt bud
    3 bud
    By nå
    Project in system verilog 2 dager left
    VERIFISERT

    Build a project using system verilog

    C-programmering Elektrisk ingeniørvitenskap FPGA Matlab and Mathematica Verilog / VHDL
    $190 (Avg Bid)
    $190 Snitt bud
    12 bud
    By nå
    Finite state machine using Quartus 1 dag left
    VERIFISERT

    finite-state synchronous machines mealy and moore machine for given task.

    Elektrisk ingeniørvitenskap Elektronikk Ingeniørvitenskap Matlab and Mathematica Verilog / VHDL
    $130 (Avg Bid)
    $130 Snitt bud
    21 bud
    By nå
    Work on VHDL Laboratory like Latches, Flip-flops and registers 19 dager left
    VERIFISERT

    Need to investigate the latches, flip-flops and the registers in VHDL laboratory work

    C-programmering Ingeniørvitenskap FPGA LabVIEW Verilog / VHDL
    $69 (Avg Bid)
    $69 Snitt bud
    10 bud
    By nå
    Design a digital clock using verilog nexys 4 fpga 9 dager left

    digital Alarm clock. I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    Arduino Elektrisk ingeniørvitenskap Elektronikk Microcontroller Verilog / VHDL
    $53 (Avg Bid)
    $53 Snitt bud
    11 bud
    By nå
    code for Brushless DC motor controller using msp430 9 dager left

    I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    Arduino Elektrisk ingeniørvitenskap Elektronikk Microcontroller Verilog / VHDL
    $28 (Avg Bid)
    $28 Snitt bud
    7 bud
    By nå
    VHDL- VHSIC (Very High Speed Integrated Circuit) Hardware Description Language 8 dager left

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.

    Analog Electronics Elektronikk Embedded Systems FPGA Verilog / VHDL
    $15 (Avg Bid)
    $15 Snitt bud
    3 bud
    By nå
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